Question

struct A { int i; };
...
A *p = (A*) (8); // or A *p = 0;
p->i = 5;    // Undefined Behavior according C/C++ standard

However, practically most of the system would crash (segmentation fault) for such code.

Does it mean that all such Architectures/Systems have a hidden check for pointer indirection (i.e. p->) to verify if it s accessing a wrong memory location ?

If yes, then it implies that even in perfectly working code we are paying the price for that extra check, correct ?

Answer 1

无,不正确。由于以下两个原因,绝对需要对有效记忆存取进行同样的检查:

1) Otherwise, how would the system know what physical memory you were accessing and whether the page was already resident?

(2) 否则,如果实际记忆变得紧张,操作系统将如何知道哪几页的实物记忆?

It s integrated into the entire virtual memory system and part of what makes modern computers perform so amazingly well. It s not any kind of separate check, it s part of the process that determines which page of physical memory the operation is accessing. It s part of what makes copy-on-write work. (The very same check detects when a copy is needed.)

Answer 2

There are generally no extra hidden checks, this is just an effect of using virtual memory.

Some of the potential virtual addresses are just not mapped to physical memory, so translating things like 8 will likely fail.

Answer 3

Yes, you are paying the price for that extra check. It s not just for pointer indirection, but any memory access (other than, say, DMA). However, the cost of the check is very small.

While your process is running, the page table does not change very often. Parts of the page table will be cached in the translation lookaside buffer, accessing pages with entries in the buffer incur no additional penalty.
如果您的工作能够进入一个没有TLB进入的网页,那么,CPU必须增加记忆,使该页页的页表进入。之后,将安排时间。

你们可以通过起草试验方案来看待这一效果。 • 抽取你的试样方案,并随机抽取和书写记忆。利用指挥线参数改变规模。

Above the L1 cache size, performance will drop due to L2 cache latency.
Above the L2 cache size, performance will drop to RAM latency.
Above the size of the memory addressed by the TLB, performance will drop due to TLB misses. (This might happen before or after you run out of L2 cache space, depending on a number of factors.)
Above the size of available RAM, performance will drop due to swapping.
Above the size of available swap space and RAM, the application will be terminated by the OS.

如果您的运行系统允许“大页”,TLB可能实际上能够覆盖一个非常大的地址空间。也许你可以通过从<条码>mmap中分配4k chunks来破坏本组织,在这种情况下,根据你的处理者,TLB misses可能只感受几个工作套。

<>光> 必须根据虚拟记忆的惠益来权衡业绩下降幅度较小的情况,而虚拟记忆的惠益太大,无法在此列出。

Answer 4

分裂错误是试图获取传记,而公民保护委员会不能实际处理。发生这种情况的是,这些硬件向一个操作系统发出有关侵犯记忆的信号。因此,我认为,如果试图进入记忆地点,硬件无法向后来向造成例外的程序发出信号的监督厅发出信号,就没有进行额外的核对。接收信号的过程不成事实,就把核心信息倾斜并终止。

Answer 5

首先,你们需要阅读和理解:。

因此,通常的情况是,当一个过程试图忽略一个无效的虚拟记忆地点时,本组织追捕了MMU(见上文链接)为无效虚拟地址(0x0,0x8, 不管怎样)。接着,监督厅在其网页表上审视了该地址,发现该地址,并发出SIGSEGV信号(或类似)与造成该过程坠毁的过程。

有效地址和无效地址之间的区别在于,监督厅是否为这一地址分配了一个网页。多数专才从设计上永远不会分配第一页(从0x0开始),这样,全国人民军的参比就会永远消失。

因此,你再次要求进行“外部检查”实际上是对每一页的过错、有效地址或未进行同样的检查——这只是一个问题,即页面检查是否成功。

友情链接