Question

I am trying to interface the data flash with 89lp 4052 controller. Crysal used 11.0592 mhz. This controller has built in spi bus. I tried all combinations of CPHA AND CPOL. Tried mode 0 as well as mode 3. Not able to read staus register. Some times it happens that it reads the register but sometimes it just ff code out from flash.

my code is as follows.

                        CLR     SCLK
        CLR     CS
        LCALL       DELAY2

;;==============================================================================

WRITE_FLASH: MOV 20H,#0D7H ;COMMAND LCALL SEND_CLOCK_ONE LCALL READ_FLASH CLR SCON.1 MOV A,21H MOV SBUF,A JNB SCON.1,$ CLR SCON.1 ;;======================================================================= SETB CS CLR SCLK LCALL DELAY2 CLR CS ;SELECTED AGAIN MOV 20H,#84H LCALL SEND_CLOCK MOV 20H,#00H LCALL SEND_CLOCK
MOV 20H,#00H LCALL SEND_CLOCK
MOV 20H,#00H LCALL SEND_CLOCK
MOV 20H,#33H LCALL SEND_CLOCK LCALL DELAY2 SETB CS LCALL DELAY2 CLR SCLK CLR CS ;SELECTED AGAIN MOV 20H,#0D4H LCALL SEND_CLOCK
MOV 20H,#00H LCALL SEND_CLOCK
MOV 20H,#00H LCALL SEND_CLOCK
MOV 20H,#00H LCALL SEND_CLOCK
MOV 20H,#00H LCALL SEND_CLOCK_ONE

        LCALL       READ_FLASH
        CLR     SCON.1
        MOV     A,21H
        MOV     SBUF,A
        JNB     SCON.1,$
        CLR     SCON.1
        SETB        CS
        SETB        SCLK
        LCALL       DELAY2

        LJMP        REP

;;======================================================================= SEND_CLOCK_ONE: MOV C,07H ;MSB MOV DOUT,C LCALL PULSE_SEND MOV C,06H MOV DOUT,C LCALL PULSE_SEND MOV C,05H MOV DOUT,C LCALL PULSE_SEND MOV C,04H MOV DOUT,C LCALL PULSE_SEND MOV C,03H MOV DOUT,C LCALL PULSE_SEND MOV C,02H MOV DOUT,C LCALL PULSE_SEND MOV C,01H MOV DOUT,C LCALL PULSE_SEND
MOV C,00H MOV DOUT,C LCALL PULSE_SEND_LAST RET ;;=========================================================================== READ_FLASH: LCALL PULSE_SEND MOV C,DIN MOV 0FH,C LCALL PULSE_SEND MOV C,DIN MOV 0EH,C LCALL PULSE_SEND MOV C,DIN MOV 0DH,C LCALL PULSE_SEND MOV C,DIN MOV 0CH,C LCALL PULSE_SEND MOV C,DIN MOV 0BH,C LCALL PULSE_SEND MOV C,DIN MOV 0AH,C LCALL PULSE_SEND MOV C,DIN MOV 09H,C LCALL PULSE_SEND MOV C,DIN MOV 08H,C LCALL PULSE_SEND RET ;;======================================================================= SEND_CLOCK: MOV C,07H ;MSB MOV DOUT,C LCALL PULSE_SEND MOV C,06H MOV DOUT,C LCALL PULSE_SEND MOV C,05H MOV DOUT,C LCALL PULSE_SEND MOV C,04H MOV DOUT,C LCALL PULSE_SEND MOV C,03H MOV DOUT,C LCALL PULSE_SEND MOV C,02H MOV DOUT,C LCALL PULSE_SEND MOV C,01H MOV DOUT,C LCALL PULSE_SEND
MOV C,00H MOV DOUT,C LCALL PULSE_SEND RET

;;=========================================================================== DELAY2: mov 56H,#0FFH DJNZ 56H,$ mov 56H,#0FFH DJNZ 56H,$ RET ;;=================================================================== PULSE_SEND: SETB SCLK LCALL DELAY2 CLR SCLK LCALL DELAY2 RET ;;=================================================== PULSE_SEND_LAST: SETB SCLK LCALL DELAY2 RET ;;===================================================== PULSE_READ_FIRST: CLR SCLK LCALL DELAY2 SETB SCLK LCALL DELAY2 RET ;;===========================================================

END

Answer 1

Bring out your oscope, look at the SPI bus (the clk signal and the DO from your controller). Your flash datasheet has a timing diagram that shows how the data should be clocked in and out (on the edge or at the mid-point of each clock cycle), on what edge, and where the bus should idle.

Then tweek the settings on your controller till what you see out of your controller matches what you see on your flash datasheet.

Finally, read the flash datasheet carefully, it probably has something like it expects data in 8 bit chunks or 24 bit chunks before the CS (chip select) pin is raised to end and latch in the data. Make sure you do that, only when your flash expects it.

Then, it will work. :-) good luck.

Answer 2

I had a similar symptom when I was coding for a similar Flash chip.

My problem was that there were other Chip Select lines to other chips (RTC, UART, etc) that I did not initialize, so they defaulted to low. The low Chip Select allows those chips to drive the MISO (master in, slave out) data line so that the microcontroller couldn t read anything.

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