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Assigning wires deep in a nested set of modules
原标题:

I have a wire that is about 4 levels deep and I really don t want the hassle of having to propagate it up the hierarchy. Is there any way to assign the wire using some sort of referencing? I know I can access the wire by typing:

cca.cpu0.cca3_cpu.nc1_cp_checkpoint 

but

assign cca.cpu0.cca3_cpu.nc1_cp_checkpoint = checkpoint;

doesn t work

Anyone know of any way to do it?

最佳回答

Since you have not shown sufficient code for anyone to reproduce your problem, nor have you revealed any details regarding your problem, all we can do is guess.

My guess is that nc1_cp_checkpoint is declared as a reg inside your cca3_cpu instance. You can not assign a value to a reg using a continuous assignment. Try to use a procedural assignment (inside an initial or always block), for example:

initial begin
    cca.cpu0.cca3_cpu.nc1_cp_checkpoint = checkpoint;
end

If this doesn t solve your problem:

  1. Show more relevant code
  2. Elaborate on "doesn t work". Show your error message, if any.

Update: Another potential issue arises if nc1_cp_checkpoint is a continuously-driven wire inside your cca3_cpu instance. In that case, your second assign might cause contention, which would make the value go unknown (x). You might be able to avoid that issue using force and release.

问题回答

From your tag, you seem to be indicating that you re using VCS. Are you getting a:

Error-[XMRE] Cross-module reference resolution error
Cross module resolution failed, token BLAH . 
Originating module  foo . "foo.v", 666: 

That would indicate that your path isn t correct.

Cross-module references do work, but they may not be enabled if you re constraining your design to synthesizable constructs. Look up "cross-module reference" in the VCS user guide.





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