因此,首先要澄清一些事项:
- In the case of the x86 architecture, it is not the operating system that determines the paging policy, it is the CPU (more specifically it s MMU). How the operating system views the paging system is independent of the the way it is implemented. As a commenter rightly pointed out, there is an OS specific component to paging models. This is subordinate to the hardware s way of doing things.
- 32 bit and 64 bit x86 processors have different paging schemes so you can t really talk about the x86 paging model without also specifying the word size of the processor.
下面是使用最简单版本的32比特×86版模型的大规模压缩版。 还有许多 t,这是可能的,我知道,各种非洲顾问办利用了它们。 我不去做,因为我不真的熟悉大多数监督厅的内部,而且因为你真的不了解,直到你掌握了更简单的东西。 如果你想要知道x86计算模型的所有可贵的炉子,你可以到英特尔:。
在最简单的文字模式中,记忆空间分为4KB区,称为网页。 其中1024个区块被绘制成一个页表(面积为4KB)。 另有一级间接数据,所有1024页的表格被绘制成4KB页的目录,该名录的基面在加工商的特别登记册<代码>%cr3<<>。 这一两级结构已经建立,因为本组织的大多数记忆空间是sparse<>em>,这意味着大多数记忆空间没有使用。 你们不想把一刀切的页桌旁放在一旁,用于记忆。
当你拿到一个记忆地址时,最重要的10个比值指数是页数,这为你提供了页表的基础。 接下来的10个轨道指数进入该页表,以向您提供物理页基数(也称为物理线)。 最后,最后的12个参数指数在框架中。 母亲和母亲部对你来说都是如此,假定你有“条码”>%cr3正确值。
64个轨道系统有4级 日报系统,因为它们的记忆空间更加稀少。 此外,还有可能出现4KB的页数。
To actually get to your questions:
- All of this paging information (tables, directories etc) sits in kernel memory. Note that kernel memory is one big chuck and there is no concept of having kernel memory for a single process.
- There is only one page directory per process. This is because the page directory defines a memory space and each process has exactly one memory space.
- The last paragraph above gives you the way an address is chopped up.
Edit: 清洁和细微改动。