The Pentium processor and more recent processor families use branch-prediction techniques to improve performance by prefetching the destination of a branch instruction before the branch instruction is executed. Consequently, instruction execution is not deterministically serialized when a branch instruction is executed.
这意味着什么?
它确实是健全的,确实是坏的。 它像CPUID这样的连续指令一样,打破了分支预测(或反之亦然),但这似乎不大可能。 任何公民团体都能够帮助我了解“非决定性”在这方面的含义。
* 为澄清起见,本文件仅作少量印发。
它措辞非常令人混淆,但我认为其实际含义很简单:“各条不一定是序列执行”。 我们今天同意这样做,但并不总是如此。
我怀疑你误解了这一说法,但我可以确切地说明情况。 您在序列化指示和分支预测之间有何联系? 当它说“建设性执行不是定型的序列”时,意思是,根据分支预测逻辑确定指示的序号和密码,因此它每次都以同样的方式工作。 但是,整个问题就是要更快地做事——如果事务组的预测是好的,那么,今后正确指示的大部分时间将排满顺序、编码并准备就绪。
错误的分行是序列化指示,一个准确预测的分行没有。
既然你不知道某个分支是否正确预测,或者直到执行,那么,如果将指令的序列化,你就无法事先知道。 行为是非决定性的<>,因为它取决于分支机构的预测。
也许,在有条件的分支之前和之后,你可能会构造一个独角兽案件,因为根据该守则的行为取决于该分支机构是否得到正确预测。 (一) 事务组是否正在序列化)
从万国邮联之外的一些情况来看,现代超级加权程序者一般认为,执行指示似乎完全是决定性的,而且属于顺序。 在内部,它会发出指示,执行投机性指示,并按最有效率的命令执行指示。 但是,已经执行过的任何 t(如误用的分行)都是没有承诺的,记忆的存取一般在离开万国邮联之前被退回到正确的秩序中。 CPU管道的尾端称为“重整的缓冲”,因为它的工作是跟踪指示的完成情况,并且只能按方案顺序永久承诺其结果。 这对于适当的方案行为非常重要,特别是在部门错误预测和例外的情况下;如果出现例外情况(如零分立),随后的指示可能会被编码和付诸执行,而且在将例外情况交给监督厅之前,必须从注重成果的年度报告中加以摘录,并适当重新制定方案。
关于传记命令,有一些例外情况是,对程序命令的幻觉,即可以任意重新排序,在文字和文字之间可以有一些(可能是投机性的)重新排序,但你只关心的是,在谈到记忆所编的I/O硬件时。 有一些指示确保特别秩序,而邮联则非常谨慎地命令人们查阅未经证实的记忆,因为假定这指的是I/O。
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