English 中文(简体)
What exactly does the 3-operand imul instruction do in ia-32 assembly?
原标题:

I m reading the instruction

imul 0xffffffd4(%ebp, %ebx, 4), %eax

and I m baffled by what it s doing exactly. I understand that imul multiplies, but I can t figure out the syntax.

最佳回答

Hooray for AT&T assembly base/index syntax! It s not a 3-operand multiply at all. It s the same 2-operand one you know and love, it s just that the first one is a bit complicated. It means:

%ebp + (4 * %ebx) + 0xffffffd4

Or:

%ebp + (4 * %ebx) - 44

To be a bit clearer (and in base 10). The AT&T base/index syntax breaks down as:

offset(base, index, multiplier)
问题回答

(I know and prefer Intel/MASM syntax, so I will use that. Note that the order of operands is reversed in AT&T.)

Your instruction is actually a two-operand imul, which in Intel syntax is:

imul eax, DWORD PTR [ebp + ebx*4 + 0FFFFFFD4h]

Where eax is the destination operand and the memory location is the source operand. The two-operand imul performs a multiplication of the source and destination operands and stores the result in the destination. Unlike 1-operand, it doesn t write a high half anywhere, so the same instruction works for signed and unsigned, like with add and left shift.

This instruction is multiplying a register by the integer in an array. Most likely this appears in a loop and the array is a local variable (on the stack starting at ebp-44).


The three-operand imul instruction is:

imul dest, source1, immediate
imul reg,  r/m,   imm           ; showing what kind of operand is allowed

The source1 operand (either a memory location or a register) is multiplied by the immediate operand (either an 8-bit or 16/32-bit constant) and the result is stored in the dest operand (a 16, 32 or 64-bit register).

See Intel s manual entry for imul: https://www.felixcloutier.com/x86/imul





相关问题
How can I do a CPU cache flush in x86 Windows?

I am interested in forcing a CPU cache flush in Windows (for benchmarking reasons, I want to emulate starting with no data in CPU cache), preferably a basic C implementation or Win32 call. Is there a ...

What are the names of the new X86_64 processors registers?

Where can I find the names of the new registers for assembly on this architecture? I am referring to registers in X86 like EAX, ESP, EBX, etc. But I d like them in 64bit. I don t think they are the ...

How do I disassemble raw 16-bit x86 machine code?

I d like to disassemble the MBR (first 512 bytes) of a bootable x86 disk that I have. I have copied the MBR to a file using dd if=/dev/my-device of=mbr bs=512 count=1 Any suggestions for a Linux ...

32bit application access to 64bit registry

I have an OS Shell written in 32bit that is replacing the Explorer.exe of a Vista machine. I run a utility which is also written in 32bit, which allows to switch between the Explorer shell and My ...

Left Shift Overflow on 68k/x86?

I heard that the Motorola 68000 and Intel x86 architectures handle overflow from left shifting differently. Specifically the 68k LSL vs. the Intel SAL/SHL assembly instructions. Does anyone know the ...

Translate a FOR to assembler

I need to translate what is commented within the method, to assembler. I have a roughly idea, but can t. Anyone can help me please? Is for an Intel x32 architecture: int secuencia ( int n, ...

热门标签