Question

In Instruction Set Architecture, are all kinds of instructions R- Type, I- Type, J-Type loaded into the same General Purpose Register or different kinds of instructions loaded into different registers based on the opCodes ? If different registers, then How does processor know which instruction to load to which register ? and In the design of compilers are the number of registers allowed to be loaded with instructions fixed ?

How does the processor differentiate the different types of instructions R- Type, I- Type, J-Type , is it based on the first initial opcodes ?

Answer 1

In Instruction Set Architecture, are all kinds of instructions R- Type, I- Type, J-Type loaded into the same General Purpose Register or different kinds of instructions loaded into different registers based on the opCodes ?

You seem confused. Instructions aren t loaded into registers (unless you re writing, maybe, a disassembler). Instructions are processed and executed -- which may cause other data to be copied into or out of registers.

If different registers, then How does processor know which instruction to load to which register ? and In the design of compilers are the number of registers allowed to be loaded with instructions fixed ?

Not sure what you mean here.

How does the processor differentiate the different types of instructions R- Type, I- Type, J-Type , is it based on the first initial opcodes ?

The distinction between R/I/J (this seems to be a MIPS convention?) seems somewhat arbitrary. In many architectures they can t be so neatly divided. Every instruction is decoded, and it may involve loading from memory, loading from an immediate, or changing the PC.

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